(a) Field of the Invention
The present invention relates to a semiconductor integrated circuit, and more particularly to an improvement in an integrated injection logic (IIL) type semiconductor integrated circuit (IC).
(b) Description of the Prior Art
The IIL type IC is a logic IC in which a plurality of inverter transistors have their inputs and outputs connected thereamong to constitute a desired logic, and a plurality of injector transistors are integrated in the same semiconductor wafer to inject carriers into the respective inverter transistors. In the conventional ILL, both the injector transistor and the inverter transistor are formed with bipolar transistors. Due to the carrier storage effect and like effects in the bipolar transistor, the switching speed, power dissipation and clocking or the like have been limited. Improvements particularly in the switching speed and the power dissipation have been desired. FIGS. 1 and 2 show an example of the prior art IIL circuit. In FIG. 1, each of inverter transistors Qd.sub.1, Qd.sub.2, Qd.sub.3, . . . is comprised of an npn-type bipolar transistor having three collectors C.sub.1, C.sub.2 and C.sub.3 (for separate outputs), . . . , a grounded emitter E and a base B connected to a selected collector C.sub.3 of the inverter transistor of the preceding stage. More particularly, the wired AND output of the selected collectors of the inverter transistors of the preceding stage is supplied to the base of the inverter transistor. Each of injector transistors Qi.sub.1, Qi.sub.2, . . . is comprised of a pnp-type bipolar transistor having an injection (emitter) electrode I, a grounded base B and a collector C connected to the base B of the corresponding inverter transistor. Hereunder, the operation of this conventional circuit will be described briefly. Assume now that a positive voltage is applied to the injection (emitter) electrode I of an injector transistor Qi.sub.1 and that the inverter transistor Qd.sub.1 of the preceding stage is turned off. Then, carriers (holes) are injected from the emitter I of the injector transistor Qi.sub.1 to the base B of this injector transistor and collected by the collector C of the injector transistor Qi.sub.1 which is the base B of the inverter transistor Qd.sub.2 to turn this inverter transistor Qd.sub.2 on. When the inverter transistor Qd.sub.1 of the preceding stage is turned on, carriers injected from the injector transistor Qi.sub.1 are absorbed into (or allowed to flow through) this turned-on inverter transistor Qd.sub.1 of the preceding stage and hence the inverter transistor Qd.sub.2 is turned off. The respective stages of this IIL circuit operate similarly. It will be apparent that when a wired AND output of a plurality of inverter transistors is connected to the base of the inverter transistor of the next stage, the inverter transistor of the next stage is turned on when all the inverter transistors are turned off and is turned off when any one of the inverter transistors is turned on. Clocking of this IIL type semiconductor integrated circuit is generally performed by applying clock pulses to the injection electrodes I of the injector transistors Qi.sub.1, Qi.sub.2. . . .
The switching speed of such an IIL type semiconductor integrated circuit depends on the switching speed of the injector transistors Qi.sub.1, Qi.sub.2, . . . and the carrier injection efficiency (equal to the common base current gain) .alpha. of the injector transistors Qi.sub.1, Qi.sub.2, . . . . Here, for improving the turn-on speed of the inverter transistors Qd.sub.1, Qd.sub.2, Qd.sub.3, . . . , a sufficient amount of carriers should by injected from the injector transistor into the base region of the inverter transistor. As can be seen from FIG. 9, the carrier injection efficiency .alpha. of the injector transistor of the conventional IIL type semiconductor integrated circuit is low, and further rapidly decreases with the increase in the injection current Ii when the injection current Ii exceeds above about 100 .mu.A. Therefore, an increase in the power loss is inevitable for injecting sufficient carriers. Furthermore, since clocking is performed by applying clocking pulses to the injection electrodes of low impedance, a considerable current and hence power is required for clocking. FIG. 2 shows a partial cross-sectional structure of a conventional IIL type semiconductor integrated circuit having the circuit connection of FIG. 1. In the figure, a semiconductor wafer 10 is comprised of an n-type semiconductor substrate 11 of a low resistivity and an n-type epitaxial semiconductor layer 12 of a relatively high resistivity grown thereon. P-type regions 13 and 14 of a relatively low resistivity are formed in the n-type epitaxial layer 12 by the selective diffusion or like techniques. In the p-type region 14, n-type semiconductor regions 15, 16 and 17 of a further low resistivity are formed by diffusion or like techniques. Metal electrodes 18, 19, 20, 21, 22 and 23 are formed on the lower surface of the semiconductor substrate 11 and on the surfaces of the respective semiconductor regions 13, 14, 15, 16 and 17. Here, numeral 24 denotes an oxide film. The semiconductor regions 12, 13 and 14 constitute the base, the emitter and the collector of the injection transistor Qi.sub.1. Also, the semiconductor regions 12, 14 and 15, 16 and 17 constitute the emitter, the base and the collectors of the inverter transistor Qd.sub.2.
As can be easily seen from the above-stated structure, part of the carriers injected from the emitter region 13 to the base region 12 of the injector transistor Qi.sub.1 is not directed to the collector region 14 of the injector transistor Qi.sub.1 but to the substrate 11. For increasing the ratio of carriers arriving at the collector region 14 with respect to the whole carriers injected from the emitter region 13, the base width W.sub.B would be reduced as small as possible. In the bipolar transistor of the lateral structure, however, there naturally lies a limit from the point of manufacture for decreasing the base width W.sub.B. This constitutes a factor for decreasing the carrier injection efficiency .alpha.. Furthermore, in the case when the inverter transistor Qd.sub.1 of the preceding stage is turned off, carriers injected from the emitter 13 to the base 12 and reach the collector 14 of the injector transistor raises the collector potential to cause the reverse injection from the collector region 14 to the base region 12 as the amount of carriers directed to this collector increases. On the other hand, since the pn-junction between the emitter region 13 and the base region 12 becomes forwardly and deeply biased to cause injection of many carriers, the role of the resistance of the base region 12 becomes large and the ratio of carriers into the semiconductor substrate 11 increases. This forms a reason for the rapid drop of the carrier injection efficiency .alpha. with the increase of the injected current Ii.